Atomic Operations

Tags

comp-arch

Is an operation that no other processor can interrupt.

For example on a specific machine architecture if you run an assembly instruction to increment a register, that may be broken down into a few different steps on the circuity (example: fetching the value from memory -> storing in cache -> adding to it -> writing back). If these steps are split up between multiple processors or threads they could happen mismatch the result timing leading to writes that are lost or reads that are out of date.

In practice we avoid making operations atomic except when we have to. This is due to a noticeable slow down in performance.